Elastic computing (not to be confused with Amazon’s Elastic Compute Cloud) is an optimization framework for multi-core heterogeneous systems that enables mainstream designers to more effectively take advantage of accelerators such as GPUs, FPGAs, and multi-core processors. From a designer’s point of view, elastic computing provides a library of specialized elastic functions. However, unlike traditional functions, elastic functions contain a knowledge based of different algorithms, optimizations, and parallelizations for the given function. This knowledge base enables the elastic computing framework to transparently optimize a function for different runtime conditions, while parallelizing the implementation across available resources.
This work is supported by the National Science Foundation grant CNS-0914474. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.
Wernsing, J., and Stitt, G. Elastic computing: A framework for transparent, portable, and adaptive multi-core heterogeneous computing. In LCTES ’10: Proceedings of the 2010 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems (April 2010), ACM, pp. 115–124.
Detailed Overview: Wernsing, H. and Stitt, G. Elastic computing: A portable optimization framework for hybrid computers, Parallel Computing: Special Issue on Application Accelerators in HPC, To Appear.
Wernsing, J., and Stitt, G. A scalable performance prediction heuristic for implementation planning on heterogeneous systems. In ESTIMedia’10: 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia (October 2010), pp. 71–80.
Intermediate Fabrics (FPGA Device Virtualization)
Despite significant performance and energy advantages for important application domains, FPGAs have limited usage due to low application-design productivity compared to CPUs and GPUs. Two main sources of low productivity are long compile times, often requiring hours or even days, and a lack of application portability that prevents design reuse. Intermediate fabrics address these problems via virtual reconfigurable architectures implemented atop FPGAs. By matching virtual resource granularity to application requirements, intermediate fabrics can perform place & route orders-of-magnitude faster than commerical tools. Furthermore, by hiding the underlying FPGA from the application, intermediate fabrics enable application portabiltiy across potentially any FPGA with enough resources to implement the intermediate fabric.
This work is supported by National Science Foundation grant CNS-1149285 and the I/UCRC Program of the National Science Foundation under Grant No. EEC-0642422. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.
Coole, J., and Stitt, G. Intermediate fabrics: Virtual architectures for circuit portability and fast placement and routing. In CODES/ISSS ’10: Proceedings of the IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis (October 2010), pp. 13–22.